1. Field of the Invention
This invention relates to an electric circuit usable in a large-scale logic IC and more particularly to a sequential circuit having a construction which may be easily changed to a combination circuit.
2. Description of the Related Art
A design of the electric circuits in a logic IC for testability becomes important as the integration density in the logic IC is greatly increased. A flip-flop circuit is a basic circuit in a logic IC and is frequently used in designing such large-scale IC. There are many problems in testing such large-scale IC which uses a plurality of flip-flops. For example, a signal for testing a particular circuit part in the logic IC must be applied thereto and/or derived therefrom through a large number of flip-flops. This means that a long time and a complex operation are required for the input and/or output of the test signal.
More specifically, a conventional D-type flip-flop circuit 60 is schematically shown in FIG. 1 and has a data input terminal D, a terminal C for a control signal such as a clock signal, a set signal input terminal S, a reset signal input terminal R, an output signal terminal Q and an inverted output signal terminal Q.
Such a conventional flip-flop 60 as mentioned above is a logic circuit having a very simple function that a set data applied to the data input terminal D is simply transferred to the output signal terminals Q and Q, basically, by a clock signal applied to the control signal input terminal C. In an electronic circuit wherein a plurality of flip-flop circuits are employed, however, a variety of problems take place on testing combination circuits which are positioned before and after these flip-flop circuits. In order to ascertain the logical operation of a combination circuit which determines the data applied to flip-flop circuits, for instance, it is prerequisite to write these data into the flip-flop circuit group by the clock signal, and thus the number of clocks increases as the complexity of the combination circuit increases. Likewise, in order to ascertain the logical operation of a combination circuit positioned after the flip-flop circuit, all input patterns required therefor need to be impressed from the output of the flip-flop circuit and, therefore, a number of clocks are required for this purpose as well. Furthermore, the above-mentioned two kinds of clock operations are required for ascertaining the logical operation of a combination circuit positioned between flip-flop circuits and, thus, very complicated preparation of test patterns becomes necessary. The complicated preparation can be avoided, if the flip-flop circuit is changed to a combination circuit.